Sponsor: Multibeam Systems, Inc.

• Project duration: 10/1/2004 - 9/30/2006
• Total project (est.): $2,707,480
• Requested ATP funds: $1,999,180

Lithography - the process that imprints patterns on a chip or wafer - is the most critical technological driver of the semiconductor industry. But, as the critical feature size in integrated circuits gets smaller and smaller (now down to a hundred nanometers), lithography is becoming a market barrier because of the rapidly escalating cost of the masks that hold the template of the circuit to be printed. With current technology, masks are the only practical way to produce chips in high-volumes. However, only the largest chip manufacturers can absorb the high costs of masks, and only for relatively high-volume chips. Smaller U.S. chip companies that make application-specific integrated circuits (ASICs) are finding it increasingly difficult to commercialize innovative but potentially low volume chip designs. Furthermore, over the past few years, the United States has lost its technological leadership in chip lithography to Japan and Europe. The alternative to masked systems is maskless or "direct-write" lithography, but the fastest available direct-write systems are too slow for commercially competitive chip production by a factor of 1000. Multibeam Systems proposes to meet this challenge by developing an array of 10 electron beam columns that can write a complete silicon wafer in a single pass at a speed 100 times faster than current direct-write systems. Multiple beam systems have been attempted before, but they require multiple passes with relatively low-energy beams to manage problems with edge-definition at the fringes of the beams. Instead, Multibeam Systems proposes a unique approach using high-energy beams with a sharply defined square shape. Significant technical challenges in this project include obtaining a square beam that holds its shape over a large field, minimizing beam interactions at the wafer surface, and developing the required beam steering electronics. The risks involved with developing such a complex multiple e-beam column are so high that even interested venture capital investors want to see a prototype before investing; with ATP funding, this project would produce a prototype that demonstrates the viability of the technology, and private funding for further development and commercialization should become available. The ability to develop and manufacture new ASICs more economically without masks will enable small chip manufacturers to create a much wider range of short-run, unique ASICs and thereby diversify the use of electronics in commercial products. This next-generation lithography could reclaim U.S. technological leadership in chip lithography, and guarantee leadership in the global semiconductor market.

For project information:

T.S. Ravi, (408) 855-8400 x104
tsravi@multibeamsystems.com

ATP Project Manager

Carlos Grinspon, 301-975-4448
carlos.grinspon@nist.gov

This is the fact sheet for this project as it was announced on September 28, 2004.
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