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Device Pad Structure

Caption:

A device pad structure is shown next to a penny for comparative size. The Georgia Tech Center for Low Cost Packaging Research (PRC) envisions those future devices such as ICs, MEMS, and integral passives will be embedded in the substrate via SOP (system-on-package) enabling technologies. Research at PRC is funded by the National Science Foundation Engineering Research Centers Program, the electronics industry, and the State of Georgia.

For more information, visit the Georgia Tech Center for Low Cost Packaging Research web site, http://www.prc.gatech.edu.

Device Pad Structure
(Preview Only)

Credit: Courtesy Georgia Tech Center for Low Cost Electronics Packaging Research; photo by Stanley F. Leary
Decade of Image: 2000 - 2009

Categories:

ENGINEERING / ERCs (Eng. Rsh. Cents.)

Formats Available:

Restrictions:

No additional restrictions--beyond NSF's general restrictions--have been placed on this image. For a list of general restrictions that apply to this and all images in the NSF Image Library, see the section "Conditions".

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Last Modified: Mar 29, 2001